Abstract
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, is one of the promising solutions to mitigate the interconnect problem in modern microprocessor designs. To leverage the benefits of fast latency, high bandwidth, and heterogeneous integration capability that are offered by 3D technology, new design methodologies should be developed targeting the unique feature of 3D integration. In this chapter, various approaches to model 3D electrical behavior, handle 3D thermal reliability problems, and design future 3D microprocessors are surveyed.
This chapter includes portions reprinted with permission from the following publications: Qiaosha Zou, Tao Zhang, Eren Kursun, and Yuan Xie. Thermomechanical stress-aware management for 3D IC designs. Proceedings of Design, Automation Test in Europe Conference Exhibition (DATE) (2013). Copyright 2013 IEEE.
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- 1.
In this formula, the difference of elastic between materials is omitted for simplicity.
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Xie, Y., Zou, Q. (2015). 3D Integration Technology. In: Topaloglu, R. (eds) More than Moore Technologies for Next Generation Computer Design. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-2163-8_2
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DOI: https://doi.org/10.1007/978-1-4939-2163-8_2
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