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Development of Packaging Techniques for a 960-Bit Plated-Wire Memory

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Advances in Electronic Circuit Packaging
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Abstract

On the basis of data gained from development and testing of packaging techniques used in the 960-bit memory it has been proposed that a complete buffer memory system be constructed by use of the same techniques. Some of the characteristics of the proposed system are as follows: (1) 100,000-bit storage capacity. (2) 100-kilocycle serial-bit information rate. (3) Nondestructive readout. (4) 0.3 W maximum power consumption. (5) Approximate volume of 145 in.3 (6) Approximate weight of 3.5–4 lb. (7) Operating temperature range of −20°C− +100°C.

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Lawrence L. Rosine (Editor, EDN)

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© 1965 Springer Science+Business Media New York

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Reid, G.R. (1965). Development of Packaging Techniques for a 960-Bit Plated-Wire Memory. In: Rosine, L.L. (eds) Advances in Electronic Circuit Packaging. Springer, Boston, MA. https://doi.org/10.1007/978-1-4899-7307-8_7

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  • DOI: https://doi.org/10.1007/978-1-4899-7307-8_7

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4899-7295-8

  • Online ISBN: 978-1-4899-7307-8

  • eBook Packages: Springer Book Archive

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