Submicron Patterning Techniques for Integrated Circuits

Abstract

The development of integrated circuits with ever increasing density has pushed the requirements on fine patterning technology into the submicron region during the late 80’s and device design rules will cross the 0.5μm barrier on a production level towards the middle of this decade. Optical lithography is the by far prevailing method presently, x-ray lithography has entered the pilot line evaluation phase. Whether or at what time optical lithography might lose its dominating role in IC mass production remains an open question to be answered by the upcoming technological improvements and the economic performances of the lithographic techniques competing with each other. The topics discussed in this paper are limited to optical lithography which will maintain it’s position as the industrial workhorse at least for several years. After a discussion of the lithography requirements in the next section, a discussion of resist materials for the relevant wavelength regions followed by examples for enhanced lithographic processes will be given. For transferring the lithographically generated patterns into underlying materials dry etching became the standard method during the 80’s. This field is characterized by an increasing diversity both with respect to technical methods and involved chemistries due to the large number of different materials to be etched. In addition to the wellknown patterning of various layers into fine patterns, deep trench/groove etching into the semiconductor substrate as well as blanket planarizing etchback became important applications. These two items will be addressed in the section on dry etching after a short view over requirements and methods in the dry etching field.