A Unified Approach to Yield Analysis of Defect Tolerant Circuits
The dependence of the yield of defect tolerant VLSI circuits on the size of defect clusters (relative to the chip size) has been recently recognized. Consequently, models for yield analysis have been proposed for “large area clustering” and “small area clustering”. By adding a new parameter, the block size, to the existing parameters of the defect distribution we unify the analysis of the existing models and at the same time add a whole range of “medium size clustering” models, thus increasing the flexibility in choosing the appropriate yield model. We illustrate our approach through several numerical examples and propose methods for estimating the newly defined block size.
KeywordsBlock Size Negative Binomial Distribution Defect Distribution Average Cluster Size Area Cluster
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