Bi-Directional Optical Backplane Bus with Multiple Bus Lines for High Performance Bus Systems

  • Chunhe Zhao
  • Ray T. Chen

Abstract

Over the past decade, the demand for more computing power has increased to such an extent that no single processor can provide the solutions in many applications. As a result, various efforts were made to build multiprocessor systems. Among those, systems based on electrical backplane buses, as shown in Fig. 1, have been prevailing in the commercial market mainly due to the ease of design and low cost. However, as the signal speed increases along the backplane, the transmission line effects become dominant, and the bus performance becomes limited by backplane physics1,2. Although advanced buses like Futurebus+3 guarantee an incident wave switching, other inherent problems degrade the performance significantly4. As new faster processors arise, the electrical backplane buses can no longer supply the bandwidth required for high performance multiprocessor systems.

Keywords

Multiprocessor System Angular Misalignment Vertical Cavity Surface Grin Lens Lateral Misalignment 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    P. Sweazey, “Limits of performance of backplane buses,” in Digital Bus Handboo, edited by J. De Giacomo, McGraw-Hill, New York(1990).Google Scholar
  2. 2.
    TEER Futurebus+ P869.1: Logical Layer Specifications, Published by IEEE, New York(1990).Google Scholar
  3. 3.
    Ray T. Chen, “VME optical backplane bus for high performance computer,” reprinted from Optoelectronics-Device and Technologie.(1994).Google Scholar
  4. 4.
    J. W. Goodman, F. I. Leonberger, S.-Y. Kung, and R. A. Athale, “Optical interconnections for VLSI systems,” Proc. IEE. 72(7), 850:866(1984).Google Scholar
  5. 5.
    C. Zhao, Tchang-hun Oh and Ray T. Chen, “General purpose bi-directional optical backplane: high-performance bus for multiprocessor systems,” in Proc. 2nd int’l. conference on massively parallel processing using optical interconnection., E. Schenfeld ed., IEEE Computer Society Press, 188(1995).Google Scholar
  6. 6.
    J. P. G. Bristow, “Recent progress in optical backplane,” presented at OE/LASE ′94, Los Angeles, California 22–29 January(1994).Google Scholar
  7. 7.
    J. Hyde, “The Multibus II bus structure,” in Digital Bus Handboo., edited by J. De Giacomo, McGraw-Hill, New York(1990).Google Scholar
  8. 8.
    A. Takai, T. Kato, S. Yamashita, S. Hanatani, Y. Motegi, K. Ito, H. Abe, and H. Kodera, “200-Mb/s/ch 100-m optical subsystem interconnections using 8-channel 1.3-mm laser diode arrays and single-mode fiber arrays,” Journal of Lightwave Technolog., vol. 12, 260:269(1994).Google Scholar
  9. 9.
    T. Nagahori, M. Itoh, I. Watanabe, J. Hayashi, and H. Honmou, “150 Mbit/s/ch 12-channel optical parallel interface using an LED and a PD array,” Optics and Quantum Electronic., vol. 24, S479:S489(1992).CrossRefGoogle Scholar
  10. 10.
    R. A. Morgan, “Advances in Vertical Cavity Surface Emitting Lasers,” Proc. SPI., vol. 2147, 97(1994).CrossRefGoogle Scholar
  11. 11.
    D. Vakhshoori, J. D. Wynn, and G. J. Zydzik, “8 x 18 top emitting independently addressable surface emitting laser arrays with uniform threshold current and low threshold voltage,” Applied Physics Utters, vol. 62, 1718:1720(1993).CrossRefGoogle Scholar
  12. 12.
    A. von Lehmen, C. Chang-Hasnain, J. Wullert, L. Carrion, N. Stoffel, L. Florez, and J. Harbison, “Independently addressable InGaAs/GaAs Vertical cavity surface emitting laser arrays,” Electronics Utter., vol. 27, 583:585(1991).CrossRefGoogle Scholar
  13. 13.
    R. A. Novotny, “Parallel optical data links using VCSELs,” Proc. SPI., vol. 2147, 140–149(1994).CrossRefGoogle Scholar
  14. 14.
    S. Tang, R. T. Chen, D. Gerald, M. M. Li, C. Zhao, S. Natarajan, and J. Lin, “Design limitations of highly parallel free-space optical interconnects based on arrays of vertical-cavity surface emitting laser diodes, microlenses, and photodetectors,” Proc. SPI., vol. 2153, 323:33(1994).CrossRefGoogle Scholar
  15. 15.
    T. V. Muoi, “Receivers design for high-speed optical-fiber systems,” Journal of Lightwave Technolog., vol. LT-2, 243:267(1984).CrossRefGoogle Scholar
  16. 16.
    J. L. Jewell, J. P. Harbison, A. Scherer, Y. H. Lee and L. T. Florez, “Vertical-cavity surface-emitting lasers: design, growth characterization,” IEEE J. Quantum Electron., vol. QE-27, 1332:1346(1991).CrossRefGoogle Scholar
  17. 17.
    K. Uomi, S. J. B. Yoo, A. Scherer, R. Bhat, N. C. Andreadakis, C. E. Zah, M. A. Koza and T. P. Lee, “Low threshold, room temperature pulsed operation of 1.5 μm vertical-cavity surface-emitting lasers with an optimized multi-quantum well active layer,” IEEE Photon. Tech. Lett., vol. 6, 317:319(1994).CrossRefGoogle Scholar
  18. 18.
    M. J. Wale and C. Edge, “Self-aligned flip-chip assembly of photonic devices with electrical and optical connections,” IEEE Transactions on Components, Hybrids and Manufacturing Technolog, vol. 13, 780:786(1990).Google Scholar
  19. 19.
    H. Deng, C. C. Lin, D. L. Huffaker, Q. Deng and D. G. Deppe, “Temperature dependence of the transverse lasing mode in vertical-cavity lasers,” J. Appl. Phys., vol. 77, pp. 2279–2286, 1995.CrossRefGoogle Scholar
  20. 20.
    C. Lin, Optoelectronic Technology and Lightwave Communications System. (Van Nostrand Reinhold, New York, ch. 15(1989).CrossRefGoogle Scholar
  21. 21.
    C. Zhao and Ray T. Chen, “Performance consideration of three-dimensional optoelectronic interconnection for intra-multichip-module clock signal distribution,” has been sent to J. Appl. Opt. for publication 1996).Google Scholar
  22. 22.
    SELFOC Product Guide, NSG American, Inc., somerset, NJ.Google Scholar

Copyright information

© Springer Science+Business Media New York 1997

Authors and Affiliations

  • Chunhe Zhao
    • 1
  • Ray T. Chen
    • 1
  1. 1.Microelectronics Research Center, Department of Electrical and Computer EngineeringThe University of Texas at AustinAustinUSA

Personalised recommendations