Low Latency Optical Bus for Multiprocessor Architecture
Many computing applications require a processing power that necessitates a parallel organization of architecture. The architectures we consider include both tightly coupled multiprocessor machines and clusters of workstations. The execution of parallel applications generally implies numerous exchanges between the different processors through a communication system, the performance of which must be appreciated in terms of throughput and latency. The throughput specification characterizes correctly the voluminous exchanges but is inadequate for describing elementary exchanges (from one to several words of data). The latency, defined as the time elapsed between the request for an elementary data and its delivery, implicitly accounts for all the layers crossed between the communicating nodes and for the communication throughput in the transport of the elementary data. Whatever application we consider, the network latency represents one bottleneck which limits the global performance. The reduction of the access latency to remote memory to a value close to the local RAM access time is a crucial factor to be considered when searching to improve the performance of a multiprocessor architecture. The utilization of optical communications has been considered for many years by computer scientists1,2,3,4,5 but how to interconnect processors via a transparent optical network with a short communication latency is an still open question. Several point to point optical links operating around 0.5–1 Gbit/s/channel have been constructed6,7.
KeywordsNetwork Latency Mesh Topology Destination Address Optical Packet Incoming Packet
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