Algorithms for High-Performance Computing with Smart Pixels

  • Dietmar Fey
  • Werner Erhard


One of the major problems in current parallel high-performance computing systems are limitations in the I/O-bandwidth. This is not only a problem on board level communication but also for chip-to-chip and even gate-to-gate interconnections especially in parallel computers. Optical interconnections between in VLSI technology manufactured electronic circuits as aspired in so-called smart pixels systems may offer in the future a solution1. This paper presents well-suited algorithms and architectures for future smart pixels systems consisting of monolithically integrated photodiodes and electronic circuits, which are hybrid mounted to vertical surface emitting laser diodes (VCSEL)2.


Processing Element Systolic Array Full Adder Gate Delay Symbolic Substitution 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media New York 1995

Authors and Affiliations

  • Dietmar Fey
    • 1
  • Werner Erhard
    • 1
  1. 1.Department of Computer Architecture and CommunicationFriedrich-Schiller-University JenaJenaGermany

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