The design of VLSI processors is dramatically affected by the constraints of the fabrication technology. The speed/complexity tradeoffs are extremely important and difficult to resolve. Additional chip functionality requires more area, and often slows down every other function of the chip. This slowdown arises from increased control logic complexity and increased capacitance loading on the wires. The decrease in overall speed can negate the desired improvement in machine performance. To prevent this from occurring in MIPS-X, our overall design philosophy was to keep the processor as simple as possible. When new features, like coprocessor support, were added, the goal was to add the minimum required to accomplish the task.


User Space Program Counter Exception Handling Memory Instruction Instruction Cache 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media New York 1989

Authors and Affiliations

  • Paul Chow
    • 1
  1. 1.University of TorontoCanada

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