Abstract
In the previous chapter, the complete space of memory faults has been introduced. These faults have a theoretical origin. In order to investigate their validity, an experimental and/or industrial analysis is required; e.g., defect injection in the memory cell and SPICE simulation.
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© 2004 Springer Science+Business Media New York
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Hamdioui, S. (2004). Preparation for circuit simulation. In: Testing Static Random Access Memories. Frontiers in Electronic Testing, vol 26. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-6706-3_4
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DOI: https://doi.org/10.1007/978-1-4757-6706-3_4
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5430-5
Online ISBN: 978-1-4757-6706-3
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