This chapter provides an overview of SystemVerilog. The topics presented in this chapter include:
The origins of SystemVerilog
Technical donations that went into SystemVerilog
Highlights of key SystemVerilog features
KeywordsHardware Description Language Technical Donation Large Design Mentor Graphic Electronic Design Automation
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
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© Springer Science+Business Media Dordrecht 2004