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Low Power Sandwich/Spin Tunneling Memory Device

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Abstract

ABSTRACT A new nonvolatile storage element has potential for greatly reducing power consumption when used in memory or as a reconfiguration element. The element uses magnetic material hysteresis to store data and tunneling magnetoresistance to read data. Advantages compared to other magnetic and semiconductor nonvolatile storage cells are cited. The design of the cell and some limited characterization data are presented along with conceptual circuit and memory architecture desings. Smaller, niche memory and reconfiguration circuits are the most probable power aware applications areas. Extension to very high density memories may be possible through using heat and magnetic field for writing data.

The work was largely carried out under DARPA Contract # F29601-00-C- 0194 entitled ”Ultra Low Power Enabling Technologies for Adaptive Reconfigurable Power Aware Computing and Communications as part of the Power Aware Computing and Communications Program.

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© 2002 Springer Science+Business Media New York

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Daughton, J., Pohm, A., Beech, R. (2002). Low Power Sandwich/Spin Tunneling Memory Device. In: Graybill, R., Melhem, R. (eds) Power Aware Computing. Series in Computer Science. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-6217-4_2

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  • DOI: https://doi.org/10.1007/978-1-4757-6217-4_2

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-3382-9

  • Online ISBN: 978-1-4757-6217-4

  • eBook Packages: Springer Book Archive

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