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Abstract

A new high-voltage approach using a CMOS basis to extend the operating voltage without requiring any modification of the process steps is detailed in this chapter. It is the technological basis of this book, and will be called Smart Voltage eXtension (SVX). In order to carry out the design of the complementary high-voltage devices, the possibilities of implementing such devices by the use of existing technological layers are examined, and the main processing steps are presented. Two dimensional computer simulations are also performed to optimise the scaling of the high-voltage parameters, and to consider the reliability aspects.

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References

  1. U. Apel, E. Habekotte, B. Hofflinger, “High-voltage CMOS Transistors in a Low-Voltage CMOS Process”, Proceedings of the International Symposium on Signals, Systems and Electronics, University of Erlangen, pp. 52–55, URSI, 1989

    Google Scholar 

  2. Technology Modeling Associates, Inc. Paolo Alto, California

    Google Scholar 

  3. S. Colak, “Effects of Drift Region Parameters on the Static Properties of Power LDMOST”, IEEE Trans. Elec. Dev.,Vol. ED-28, NO. 12, December 1981, pp. 14551466

    Google Scholar 

  4. S. C. Sun, J. D. Plummer, “ Modeling of the on-resistance of LDMOS, VDMOS, and VMOS power transistors”, IEEE Trans. Elec. Dev., Vol. ED-27, NO. 12, 1980, pp. 356

    Article  Google Scholar 

  5. M. D. Pocha, R. W. Dutton, “A Computer-Aided design Model for High-voltage double diffused MOS (DMOS) transistor”, IEEE J. Solid State Circuits, Vol. SC-11, 1976, pp. 713

    Google Scholar 

  6. X. B. Chen, Z. Q. Song, Z. J. Li, “Optimization of the Drift Region of Power MOSFET’s with Lateral Structures and Deep Junctions”, IEEE Trans. Elec. Dev., Vol. ED-34, NO. 11, November 1987, pp. 2344–2349

    Article  Google Scholar 

  7. M. J. Declercq, J. D. Plummer. “Avalanche breakdown in High-Voltage D-MOS Devices”, IEEE Trans. Elec. Dev., Vol. ED-23, January 1976, pp. 1–4

    Google Scholar 

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© 1999 Springer Science+Business Media Dordrecht

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Ballan, H., Declercq, M. (1999). Design of High-Voltage Devices Using the SVX Technique. In: High Voltage Devices and Circuits in Standard CMOS Technologies. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-5404-9_4

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  • DOI: https://doi.org/10.1007/978-1-4757-5404-9_4

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-5052-9

  • Online ISBN: 978-1-4757-5404-9

  • eBook Packages: Springer Book Archive

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