MOSFET High-Voltage Technologies

  • Hussein Ballan
  • Michel Declercq


The existing solutions avoiding the different undesirable effects presented in the previous chapter are discussed here. These solutions are distinguished first at a device level where the isolated vertical and lateral DMOSFET structures are presented. Then, the corresponding high-voltage technologies are discussed according to the isolation technique used between devices. A rough presentation of the high-voltage technologies based on the p-n junction isolation and the dielectric isolation techniques is performed. The former are more commonly known as BCD (Bipolar CMOS and DMOS) technologies and start with a bipolar basis. The latter require tricky mechanical processing of the starting material. Interest is focused on the high-voltage technologies using a CMOS basis, where the required supplementary masks and processing steps are added to implement the high-voltage devices.


Epitaxial Layer Breakdown Voltage Depletion Layer Bipolar Transistor Doping Profile 
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  1. [1]
    M. S. Adler, K. W. Owyang, B. J. Baliga, R. A. Kokosa, “The Evolution of Power Device Technology”, IEEE Trans. Electron Devices, vol. ED-31, pp. 1570–1591, November 1984.CrossRefGoogle Scholar
  2. [2]
    V. Rumennik, “Power Devices Are in the Chips”, IEEE Spectrum, vol. 22, pp. 42–48, July 1985.Google Scholar
  3. [3]
    Alcatel Mietec 12T Design and layout Manual 1997Google Scholar
  4. [4]
    M. Declercq, F. Clement, M. Schubert, “Design and Optimization of High-voltage CMOS Devices Compatible with Standard 5V CMOS Technology”, CICC proceedings, paper 24. 6, May 1993.Google Scholar
  5. [5]
    D. A. Grant, J. Gowar, “Power MOSFETs theory and applications”, John Wiley, New York.Google Scholar
  6. [6]
    B. J. Baliga, “Modern Power Devices” Krieger, Malabar Florida.Google Scholar
  7. [7]
    Y. Tarui, Y. Hayashi, T. Sekigawa, “Diffusion Self-aligned MOST: A New Approach for High Speed Device”, Proceedings of the 1“ Conference On Solid State Devices, pp. 105–110, Tokyo, 1969.Google Scholar
  8. [8]
    H. J. Sigg, G. D. Vendelin, T. Cauge, J. Kocsis, “D-MOS Transistor for Microwave applications”, IEEE Trans. Electron Devices, vol. ED-29, pp. 45–53, January 1972.CrossRefGoogle Scholar
  9. [9]
    T. P. Cauge, J. Kocsis, H. J. Sigg, G. D. Vendelin, “Double-Diffused MOS Transistor achieves microwave gain”, Electronics, pp. 99–104, February 15, 1971.Google Scholar
  10. [10]
    M. D. Pocha, A. G. Gonzalez, R. W. Dutton, “Threshold Voltage Controllability in Double-diffused-MOS Transistors”, IEEE Trans. Electron Devices, vol. ED-21, pp. 778–784, December 1974.CrossRefGoogle Scholar
  11. [11]
    M. J. Declercq, J. D. Plummer, “Avalanche Breakdown in High-Voltage D-MOS Devices”, IEEE Trans. Electron Devices, vol. ED-23, pp. 1–4, January 1976.CrossRefGoogle Scholar
  12. [12]
    J. A. Appels, H. M. Vaes, “High-Voltage Thin Layer Devices (RESURF Devices)”, IEEE Int. Trans. Electron Devices Meeting, pp. 238–241, 1979.Google Scholar

Copyright information

© Springer Science+Business Media Dordrecht 1999

Authors and Affiliations

  • Hussein Ballan
    • 1
  • Michel Declercq
    • 1
  1. 1.Swiss Federal Institute of TechnologyLausanneSwitzerland

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