MOSFET High-Voltage Technologies
The existing solutions avoiding the different undesirable effects presented in the previous chapter are discussed here. These solutions are distinguished first at a device level where the isolated vertical and lateral DMOSFET structures are presented. Then, the corresponding high-voltage technologies are discussed according to the isolation technique used between devices. A rough presentation of the high-voltage technologies based on the p-n junction isolation and the dielectric isolation techniques is performed. The former are more commonly known as BCD (Bipolar CMOS and DMOS) technologies and start with a bipolar basis. The latter require tricky mechanical processing of the starting material. Interest is focused on the high-voltage technologies using a CMOS basis, where the required supplementary masks and processing steps are added to implement the high-voltage devices.
KeywordsEpitaxial Layer Breakdown Voltage Depletion Layer Bipolar Transistor Doping Profile
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