Abstract
Performance analysis algorithms are critical for system optimization and to ensure that the system meets the real-time deadlines. Software performance analysis is difficult because software execution is less deterministic than the performance of ASICs. The number of clock cycles required for a set of operations on a synchronous ASIC is easy to predict, but the execution time of the same instruction sequence on a CPU may often vary due to cache behavior and interaction with other processes. The performance of an ASIC is seldom affected by adding another ASIC because hardware components run concurrently, while software components cannot be isolated in the same way for a shared processor. The performance analysis of ASICs is considered to be a more well-studied problem [90], so we focus on software performance in this and the next sections.
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© 1996 Springer Science+Business Media New York
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Yen, TY., Wolf, W. (1996). Previous Work. In: Hardware-Software Co-Synthesis of Distributed Embedded Systems. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-5388-2_2
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DOI: https://doi.org/10.1007/978-1-4757-5388-2_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5167-0
Online ISBN: 978-1-4757-5388-2
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