MOS transistor models for distortion analysis

  • Piet Wambacq
  • Willy Sansen
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 451)

Abstract

Due to continuous advances in technology the MOS transistor has scaled down rapidly. Whereas 3μm CMOS was used in the middle of the eighties, technologies with effective gate lengths of 0.35μm are in use in 1997. In these small devices several physical effects play a much larger role than in transistors of older technologies. Some of these effects have given rise to additional technological steps in the processing of a MOS transistor, such as the use of lightly-doped drains. As a result, a modern deep submicron transistor is a more complicated structure than a transistor of older technologies.

Keywords

Drain Current Depletion Layer Nonlinearity Coefficient Velocity Saturation Distortion Analysis 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1998

Authors and Affiliations

  • Piet Wambacq
    • 1
  • Willy Sansen
    • 2
  1. 1.IMECLeuvenBelgium
  2. 2.Katholieke Universiteit LeuvenBelgium

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