Abstract

Multiplication is usually regarded as the second most important arithmetic function. However, statistics suggest that in some large scientific programs it occurs as frequently as addition and subtraction combined. As in the previous chapter, this chapter will discuss the procedures involved in multiplication of two binary ‘bit patterns’, and will not discuss the problems of handling signed numbers. Signed multiplication will be described in chapter 4 in the discussion of the representation of negative numbers.

Keywords

Digital Computer Partial Product Arithmetic Unit Carry Save Adder Serial Adder 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. Booth, A. D., ‘A Signed Binary Multiplication Technique’, Q. Jl Mech. appl. Math., 4 (1951) 236–40.MathSciNetCrossRefMATHGoogle Scholar
  2. Dadda, L., ‘Some Schemes for Parallel Multipliers’, Alta Freq., 34 (1965) 349–56.Google Scholar
  3. Dean, K. J., ‘Design for a Full Multiplier’, Proc. I.E.E., 115 (1969) 1592–4.CrossRefGoogle Scholar
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  9. Kilburn, T., Edwards, D. B. G., and Thomas, G. E., ‘The Manchester Mk II Digital Computing Machine’, Proc. I.E.E., 107B Suppl. 2 (1956) 247–68. An early paper describing a carry-save-adder multiplier, though not by that name.Google Scholar
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Copyright information

© John B. Gosling 1980

Authors and Affiliations

  • John B. Gosling
    • 1
  1. 1.Department of Computer ScienceUniversity of ManchesterUK

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