In this chapter several complete applications will be explored to demonstrate the large impact which can be achieved by the DTSE approach. The main focus lies on target architecture styles where at least partly predefined memory organisations are present. But part of the organisation, especially on-chip, can also be customisable still. The demonstrators have been selected from different target application domains to substantiate our claims that data-dominant applications occur in a broad domain, of significant industrial relevance.
KeywordsExecution Time Motion Estimation Cache Size Storage Management Memory Architecture
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