Abstract
The implementation of a versatile VLSI chip certainly represents an important step to improve the research on Cellular Neural Networks. In this paper a VLSI realization of the multi-chip oriented, the 6 × 6 Digitally Programmable Cellular Neural Network (6 × 6DPCNN) chip, will be presented. This chip covers most of the available one-neighbourhood templates for image processing applications. Moreover, it can be easily interconnected to others to carry out very large CNN arrays. The designs and some measured results of a single chip and a multi-chip board (the 720 DPCNN System) will be shown.
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References
L. O. Chua and L. Yang, “Cellular neural metworks: Theory and applications.” IEEE Trans. Circuits and Systems 32, pp. 1257–1290, Oct. 1988.
T. Roska and J. A. Nossek (Eds), “Special issue on cellular neural networks.” IEEE Trans. on Circuits and Systems 40(3), March 1993.
Analogic CNN program library,“ Analogic and Neural Computing Laboratory, Computer and Automation Institute, Hungarian Academy of Sciences, Version 6.2, DNS-7–1995, April 1995.
J. M. Cruz and L. O. Chua, “A CNN chip for connected component detection.” IEEE Trans. Circuits and Systems, 38, pp. 812–817, July 1991.
A. Rodriguez-Castro, S. Espejo, R. Dominguez-Castro, J. Huertas, and E. Sanchez-Sinencio, “Current-mode techniques for the implementation of continuous and iscretetime cellular neural networks” IEEE Trans. on Circuits and Systems-II 40, pp. 147–155, March 1993.
K. Halonen, V. Porra, T. Roska, and L. O. Chua, “Programmable analogue VLSI CNN chip with local digital logic.” Interantional Journal of Circuit Theory and Applications 20 (5), pp. 573–582, 1992.
M. Anguita, F. J. Pelajo, A. Prieto, and J. Ortega, “Analog CMOS implementation of a discrete time CNN with programmable cloning templates.” IEEE Trans. on Circuits and Systems 40 (3), pp. 215–218, 1993.
P. Kinget and M. Steyaert, “A Programmable analog cellular neural network CMOS chip for high speed image processing.” IEEE Journal of Solid-State Circuits 30 (3), March 1995.
A. Paasio, A. Dawidziuk, and V. Porra, “High speed CNN VLSI implementation,” in Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, Atlanta, USA, May 1996, pp. 519–522.
E. Espejo, R. Carmona, R. Dominguez-Castro, and A. Rodriguez-Vazquez, “A CNN universal chip in CMOS technology.” Interantional Journal of Circuit Theory and Applications 23, pp. 93–109, Jan.—Feb. 1996.
E Sargeni, “Digitally programmable transconductance amplifier for CNN applications.” Electronics Letters 30 (11), pp. 870–872, May 1994.
F. Sargeni and V. Bonaiuto, “High performance digitally programmable CNN chip with discrete templates,” in Proceedings of CNNA-94, Third IEEE Int. Workshop on Cellular Neural Networks and their Applications, Rome, Italy, Dec. 1994, pp. 67–72.
M. Salerno, F. Sargeni, and V. Bonaiuto, “DPCNN: a modular chip for large CNN arrays,” in IEEE International Conference on Circuits and Systems (ISCAS-95), Seattle, Washington, USA, May 1995, pp. 417–420.
F. Sargeni and V. Bonaiuto, “A fully digitally programmable CNN chip” IEEE Trans. on Circuits and Systems-II 42 (11), pp. 741–745, Nov. 1995.
E Sargeni and V. Bonaiuto, “A 3 x 3 digitally programmable CNN chip.” Interantional Journal of Circuit Theory and Applications 24 (3), pp. 369–379, 1996.
M. Salerno, F. Sargeni, and V. Bonaiuto, “A 9 x 9 multichip CNN board for cellular neural networks,” in Proceedings of CNNA-96, 9th IEEE International Workshop on Cellular Neural Networks and their Application, Seville, Spain, June 1996, pp. 261–266.
M. Salerno, F. Sargeni, and V. Bonaiuto, “6 x 6DPCNN: A programmable mixed analogue-digital chip for cellular neural networks,” in Proceedings of CNNA-96, 4th IEEE International Workshop on Cellular Neural Networks and their Application, Seville, Spain, June 1996, pp. 451–456.
T. Matsumoto, L. O. Chua, and H. Suzuki, “CNN cloning template: Connected component detector.” IEEE Trans. on Circuits and Systems 37 (5), pp. 633–635, May 1990.
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Salerno, M., Sargeni, F., Bonaiuto, V. (1998). A 6 x 6 Cells Interconnection-Oriented Programmable Chip for CNN. In: Chua, L.O., Gulak, G., Pierzchala, E., Rodríguez-Vázquez, A. (eds) Cellular Neural Networks and Analog VLSI. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-4730-0_2
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DOI: https://doi.org/10.1007/978-1-4757-4730-0_2
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