Skip to main content

Flow Control and Switching Strategy for Preventing Congestion in Multistage Networks

  • Chapter
  • 59 Accesses

Abstract

Multistage Interconnection Networks are used in parallel computer applications as well as in new, high performance packet switch architecture for communication systems. In these networks the presence of unbalanced traffic loads creates significant performance problems. The main goal of this paper is to propose: (a) a flow control scheme, which permits the characterization of the traffic distribution, and (b) switching strategies, at the packet level, for controlling this performance degradation. We also present a switch model, in order to support the suggested solutions. The proposed solutions can be implemented with minimal additional logic in the switch design. Simulation results are presented to test the effectiveness of the proposed approach.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD   219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. C. Wu and T Feng, “Interconnection Networks for parallel and distributed processing”, IEEE Computer Society Press, ( USA 1984 ).

    Google Scholar 

  2. H.J Siegel, “Interconnection Networks for Large-Scale Parallel Processing: Theory and Case Studies”, Lexington Books, Lexington, (USA 1985 ).

    Google Scholar 

  3. G.E Daddis and H.C. Torng, “A Taxonomy of Broadband Integrated Switching Architectures”, IEEE Communications Magazine, Vol. 27, No. 5, (May 1989), pp 32–41.

    Article  Google Scholar 

  4. J.S Turner, “Design of a Broadcast Packet Switching Networks”, IEEE Trans. Commun., Vol. 36, No 6, (June 1988), pp 734–743.

    Article  Google Scholar 

  5. L.R. Goke and G.J. Lipovski, “Banyan network for partitioning multiprocessor systems”, in Proc. 1st Annu. Symp. Comput. Architecture, 1973, pp. 21–30.

    Google Scholar 

  6. M. Karol, M.Hluchyj, and S. M.rgan, “Input versus output queueing on a space-division packet switch”, IEEE Trans. Commun., Vol. 35, No. 12, (Dec.1987), pp. 1347–1356.

    Google Scholar 

  7. J.H. Patel, “Performance of processor-memory interconnections for multiprocessor”, IEEE Trans. Comput., Vol. C-30, No 10 (Oct.1981) pp 771–780.

    Article  Google Scholar 

  8. D.M Dias and J.R. Jump, “Analysis and Simulation of Buffered Delta Networks”, IEEE Trans. Comput., Vol. 30, No. 4 (Apr.1981), pp 273283.

    Google Scholar 

  9. Y.C. Jenq, “Performance analysis of a packet switch based on single-buffered Banyan network”, IEEE J. Select. Areas Commun., SAC-1, (1983), pp 1014–1021.

    Google Scholar 

  10. C.P. Kruskal and M. Snir, “The performance of multistage interconnection networks for multiprocessors”, IEEE Trans. Comput., Vol. 32, No. 12, (Dec. 1983), pp 1091–1098.

    Article  Google Scholar 

  11. C.P. Kruskal and M. Snir, “The distribution of waiting times in clocked multistage interconnection networks”, IEEE Trans. Comput. Vol. 37, No. 12, (Dec. 1988), pp 1337–1352.

    Article  MathSciNet  MATH  Google Scholar 

  12. T.H. Theimer, E.P. Rathgeb and M.N. Huber, “Performance Analysis of Buffered Banyan Networks”, IEEE Trans. Comput., Vol. 39, No. 2, (Feb.1991), pp 269–277.

    Google Scholar 

  13. G.F. Pfister and V.A. Norton, “Hot Spot Contention and Combining in Multistage Interconnection Network”, IEEE Trans. Comput., Vol. 34, No. 10, (Nov. 1985), pp 934–948.

    Google Scholar 

  14. P.C. Yew, N.F. Feng and D. Lawrie, “Distributing Hot-Spot addressing in large-scale Multiprocessors”, Proc. of the 1986 International Conf. on Parallel Processing, (1986), pp 51–58.

    Google Scholar 

  15. A. Norton and E. Melton, “A Class of Boolean Linear Transformation for Conflict-Free Power-of-Two Access”, Proc. of the 1987 International Conf. on Parallel Processing„ (1987), pp 247–254.

    Google Scholar 

  16. N. Tzeng, “Design of a Novel Combining Structure for Shared-Memory Multiprocessors”, Proc. of the 1989 International Conf. on Parallel Processing„ (1989), Vol. I, pp 1–8.

    Google Scholar 

  17. D. Dias and M. Kumar, “Preventing Congestion in Multistage Networks in the Presence of Hotspots”, Proc. of the 1989 International Conf. on Parallel Processing„ (1989), Vol. I, pp 9–13.

    Google Scholar 

  18. S. Chalasani and A. Varma, “Analysis and Simulation of Multistage Interconnection Networks under Non-Uniform Traffic”, Proc. of the PARBASE-90, (1990), pp 258–265.

    Google Scholar 

  19. C. Lea and D. Shyy, “Tradeoff of Horizantal Decomposition Versus Vertical Stacking in Rearrangeable Nonblocking Networks”, IEEE Trans. Commun. Vol. 39, No. 6, (June 1991), pp 899–914.

    Article  Google Scholar 

  20. S.L. Scott and G.S. Sohi, “The use of feedback in multiprocessors and its application to tree saturation control”, IEEE Trans. on Parallel and Distributed Systems, Vol. 1, No. 4, (Oct. 1990), pp 385–398.

    Article  Google Scholar 

  21. J-F. Chang and C-S. Wu, “The Effect of Prioritization on the Behaviour of a Concentrator Under an Accept, Otherwise Reject Strategy”, IEEE Trans. Commun., Vol. 38, No. 7, July 1990.

    Google Scholar 

  22. L. Kleinrock, “Distributed Systems”, Communications of the ACM, Vol. 28, No. 11, (Nov. 1985), pp 1200–1213.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 1994 Springer Science+Business Media Dordrecht

About this chapter

Cite this chapter

Pombortsis, A., Vlahavas, I. (1994). Flow Control and Switching Strategy for Preventing Congestion in Multistage Networks. In: Spaniol, O., Danthine, A., Effelsberg, W. (eds) Architecture and Protocols for High-Speed Networks. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-4536-8_5

Download citation

  • DOI: https://doi.org/10.1007/978-1-4757-4536-8_5

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-5148-9

  • Online ISBN: 978-1-4757-4536-8

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics