Abstract
In this chapter, we discuss the routing problem for high-performance analog circuits. The routing phase is critical for the overall performance of the circuit, since it fixes the final values of the interconnect parasitics. While the placement phase has taken into account the effect on the performance of the minimum values for the interconnect parasitics, their real value is determined during routing. Therefore, the main concern during performance driven routing is to connect all wires while limiting the performance degradation introduced by the actual interconnect parasitics within the specifications of the user.
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© 1999 Springer Science+Business Media New York
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Lampaert, K., Gielen, G., Sansen, W. (1999). Routing. In: Analog Layout Generation for Performance and Manufacturability. The Springer International Series in Engineering and Computer Science, vol 501. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-4501-6_5
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DOI: https://doi.org/10.1007/978-1-4757-4501-6_5
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5083-3
Online ISBN: 978-1-4757-4501-6
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