Dragon: A Placement Framework

  • Majid Sarrafzadeh
  • Maogang Wang
  • Xiaojian Yang


Standard-cell placement problem has drawn extensive research attention in VLSI/CAD ever since its appearance. Nowadays, in spite of wide use of hierarchical design methodology and floorplanning, the problem of placing standard-cells remains one of the important topics. This problem is becoming more challenging because of two reasons. First, the circuit sizes are growing dramatically. The Semiconductor Research Corporation (SRC) suggests that we should be able to place designs containing up to one million cells within 16 hours. Such a problem size means that there exists a huge space between the optimal solution and the best solution by any known heuristic. The second reason is the multi-objective placement process. In addition to the traditional objectives such as routability and timing, more issues must be taken into account during the placement, e.g., cross talk, power. The placement problem becomes harder when considering these objectives.


Simulated Annealing Placement Problem Hierarchical Placement Terminal Propagation Semiconductor Research Corporation 
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Copyright information

© Springer Science+Business Media New York 2003

Authors and Affiliations

  • Majid Sarrafzadeh
    • 1
  • Maogang Wang
    • 2
  • Xiaojian Yang
    • 1
  1. 1.Computer Science DepartmentUniversity of CaliforniaLos AngelesUSA
  2. 2.Cadence Design Systems, Inc.USA

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