Systematic Design of CMOS Current-Steering D/A converters

Abstract

The thrust to ever higher clock frequency and dynamic range in fields such as video signal processing, digital signal synthesis and wireless communications demands for high-speed and high-accuracy D/A converters. Base transceiver stations for CDMA, UMTS, WCDMA,... need 12-bit linearity or higher at sampling rates above 100MS/s. Apart from this large market, direct digital synthesis also demands D/A converters that combine high sampling speed with high-accuracy Of the several technology and architecture alternatives, CMOS current-steering architectures are particularly suited for these applications. CMOS solutions allow SoC approach, with the evident cost and power consumption advantages. Furthermore, current-steering D/A converters are intrinsically faster and more linear than competing architectures such as resistor-string D/A converters [PEL 90].