Introduction

Abstract

The (CMOS) semiconductor industry has continued to prosper since the early 70s. The even decreasing feature size has provided improved functionality at a reduced cost. An historical observation by Intel executive Gordon Moore noted that the market demand (and the semiconductor industry response) for functionality per chip (transistors, bits) doubles every 1.5 to 2 years. Equally the microprocessor unit (MPU) performance (million instructions per second: MIPS) doubles every 1.5 to 2 years, as shown in Fig. 1.1. Device size linear features have indeed decreased at a rate of about 70% every three years for most of the industry’s history. Acceleration to a 2-year cycle has been experienced in the most recent years. The cost per function has simultaneously decreased at an average rate of about 25–30%/year/function [ITRS 99]. Today’s microprocessors contain over 50 million transistors and have crossed the 1000 MIPS barrier running at clock speeds above 2 GHz [GEL01, AND 01]. By 2005 gate lengths of 80 nm are to be expected, enabling 700 million transistors to be integrated on a single die [ITRS 01].