Abstract
Most high-speed printed circuit (PC) boards undergo some degree of signal integrity analysis by engineers using one or more commercial software tools. Engineers analyze the trace layout on the board to ensure the voltage waveform at the receiver meets the required specification for proper operation. Termination resistor values are changed, or even more extreme changes are made, so that the proper voltage waveform arrives at the receiver. Once the voltage waveform is acceptable, the analysis is complete. This can result in a wide range of termination resistor values being used on designs. The value of the termination resistor is not always optimized; as long as it works, it’s acceptable. The value of the termination resistor can have an enormous effect on the intentional current on the trace, however.
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References
J. Mao, S. Luan, B. Archambeault, J. Fan, J. L. Drewniak, and T. P. Van Doren, “Estimating DC power bus noise in multi-layer PCBs using IC transient current and the power plane impedance”, IEEE EMC Symposium Proceedings, Minneapolis, MN, August 2002.
W. Cui, M. Li, X. Luo, J. L. Drewniak, T. H. Hubing, T. P. Van Doren, R. E. DuBroff, “Anticipating EMI from coupling between high-speed digital and I/O lines,” IEEE Electromagnetic Compatibility Symposium Proceedings, Seattle, WA, pp. 189–194, August 1999.
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© 2002 Springer Science+Business Media New York
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Archambeault, B.R. (2002). Using Signal Integrity Tools for EMC Analysis. In: PCB Design for Real-World EMI Control. The Springer International Series in Engineering and Computer Science, vol 696. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3640-3_10
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DOI: https://doi.org/10.1007/978-1-4757-3640-3_10
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4757-3642-7
Online ISBN: 978-1-4757-3640-3
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