Abstract
Many signal processing applications such as image transforms [27], error correction/detection involve matrix multiplication of the form Y = A * X, where X and Y are the input and the output vectors and A is the transformation matrix whose elements are 1,-1 and 0. This chapter presents optimized code generation of these transforms targeted to both register rich RISC architectures such as ARM7TDMI [6] and single register, accumulator based DSP architectures such as TMS320C2x [95] and TMS320C5x [96].
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© 2001 Springer Science+Business Media New York
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Mehendale, M., Sherlekar, S.D. (2001). Implementation of Multiplication-Free Linear Transforms on a Programmable Processor. In: VLSI Synthesis of DSP Kernels. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3355-6_6
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DOI: https://doi.org/10.1007/978-1-4757-3355-6_6
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-4904-2
Online ISBN: 978-1-4757-3355-6
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