Implementation of Multiplication-Free Linear Transforms on a Programmable Processor
Many signal processing applications such as image transforms , error correction/detection involve matrix multiplication of the form Y = A * X, where X and Y are the input and the output vectors and A is the transformation matrix whose elements are 1,-1 and 0. This chapter presents optimized code generation of these transforms targeted to both register rich RISC architectures such as ARM7TDMI  and single register, accumulator based DSP architectures such as TMS320C2x  and TMS320C5x .
KeywordsPower Dissipation Directed Acyclic Graph Register File Instruction Schedule Successive Instruction
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