An Efficient Semi-Hierarchical Array Layout

  • N. P. Drakenberg
  • F. Lundevall
  • B. Lisper
Chapter
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 613)

Abstract

For high-level programming languages, linear array layout have de facto been the sole form of mapping array elements to memory, to see widespread use. The increasingly deep and complex memory hierarchies present in current computer systems expose several deficiencies of linear array layouts. One such deficiency is that linear array layouts strongly favor locality in one index dimension of multidimensional arrays. Secondly, the exact mapping of array elements to cache locations depend on the array’s size, which effectively renders linear array layouts non-analyzable with respect to cache behavior. We present and evaluate an alternative, semi-hierarchical, array layout which differs from linear array layouts by being neutral with respect to locality in different index dimensions and by enabling accurate and precise analysis of cache behaviors at compile-time.

Keywords

Array Element Iteration Space Cache Line Index Expression Array Reference 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
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Copyright information

© Springer Science+Business Media New York 2001

Authors and Affiliations

  • N. P. Drakenberg
    • 1
  • F. Lundevall
    • 1
  • B. Lisper
    • 2
  1. 1.Department of TeleinformaticsRoyal Institute of TechnologyKistaSweden
  2. 2.Department of Computer EngineeringMälardalen UniversityVästeråsSweden

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