Digital Circuit Design with Objective VHDL

Abstract

Objective VHDL is an extension of the hardware description language VHDL. It provides the constructs necessary to design hardware in an object-oriented way. Thereby, proven software engineering concepts for abstraction and reuse can be transferred to the hardware world. Moreover, the use of Objective VHDL facilitates the use of object-orientation as a design methodology that embraces both the hardware and software parts of an embedded system, independent of the fact that a different object-oriented language may be used for software. In addition to such specification techniques, we outline synthesis steps to generate high-level VHDL from an object-oriented system level model, enabling the use of commercial behavioral synthesis tools and simulators. All these concepts are demonstrated with an example used consistently in this contribution.