Abstract
In this paper an application of the piece-wise linear (PWL) modeling technique is presented. It is oriented towards functional-level modeling of analog and mixed-signal A/D systems. The principles of the actual PWL approach are briefly described. The models are based mainly on first order differential equations, which are solved by an explicit PWL algorithm. All the analog signals propagating through a network are PWL signals obtained with the built-in approximator. Examples of some models are discussed in detail, including a support by the waveform relaxation technique. Implementation of the PWL models in a discrete VHDL environment is emphasized. Some simulation examples of A/D networks, obtained by means of the V-System simulator are also included.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
J.M.Berge, Modeling in Analog Design, Kluwer Academic Publishers, 1995. [2]A.Mantooth, Modeling with an Analog Hardware Description Language, Kluwer Academic Publishers, 1994.
J.M.Berge, Fonkoua A., Maginot S., Rouillard J. - VHDL Designer’s Reference, Kluwer Academic Publishers, 1992.
J.P.Mermet, — Fundamentals and Standards in Hardware Description Languages, NATO ASI Series, Kluwer Academic Publishers, 1993.
G.Ruan, J.Vlach, J.Barby, A.Opal, Analog Functional Simulator for Multilevel Systems, IEEE Trans. on CAD, vol. 10, No. 5, May 1991, pp. 565–575.
J.Da‘browski, Functional-Level Analog Macromodeling with Piecewise Linear Signals, Proceedings of EURO-DAC’95, Brighton, September 18–22, 1995, pp.222–227.
J.D4browski, J.Konopacki, Implementation of A/D Network Macromodels in PWL Functional-Level Simulator, Bull.of Polish Academy of Sciences, Technical Sciences, vol. 44, No. 3 1996, pp. 293–312.
R.A.Saleh, A.R.Newton, Mixed-Mode Simulation, Kluwer Academic Publishers, 1990.
A.E.Ruehli, Ed., Circuit Analysis, Simulation and Design, Part 1and2, Elsevier Scence Pub. 1986, 1987.
J.R.Armstrong, Chip-Level Modeling, Prentice Hall, Englewood Cliffs, N.J. 1988.
IEEE Standard VHDL Language Reference Manual (Integrated with VHDL-AMS changes), IEEE Std 1076.1–1997, IEEE Standards.
J.Dbrowski, A.Pulka, Discrete Approach to PWL Analog Modeling in VHDL Environment, Analog Integrated Circuits and Signals Processing, Kluwer Academic Publishers, Vol. 16, No. 2, 1998 pp. 91–99.
J.Nbrowski, Waveform Relaxation Approach to PWL Simulation of Analog and Mixed A/D Networks at the Functional Level, Proc.of ECCTD’97, Budapest 2–6, Sept.1997.
J.Dbrowski, Functional-Level Analogue Macromodelling with Piecewise Linear Signals, IEE Proc. Circuits, Devices and Systems, vol. 146, No 2, Apr.1999, pp. 77–82.
A.Vachoux, Analog and Mixed-Signal Extensions to VHDL, Analog Integrated Circuits and Signals Processing, Kluwer Academic Publishers, Vol. 16, No. 2, 1998 pp. 185–200.
R.E. Harr, A.G.Stanculescu (Ed.), Aplications of VHDL to Circuit Design, (Chapter 3 and 4), Kluwer Academic Publishers, 1991.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2001 Springer Science+Business Media New York
About this chapter
Cite this chapter
Dąbrowski, J., Pułka, A. (2001). Efficient Modeling of Analog and Mixed A/D Systems via Piece-wise Linear Technique. In: Mermet, J. (eds) Electronic Chips & Systems Design Languages. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3326-6_4
Download citation
DOI: https://doi.org/10.1007/978-1-4757-3326-6_4
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-4884-7
Online ISBN: 978-1-4757-3326-6
eBook Packages: Springer Book Archive