Abstract
Low temperature operation of Silicon CMOS transistors may be considered as a promising way to improve the device and circuit performances. The temperature reduction allows a substantial increase of the carrier mobility and saturation velocity, better turn-on capabilities, latch-up immunity, reduction in activated degradation processes, lower power consumption, decrease of leakage current, reduced thermal noise, increased thermal conductivity, etc [1–12]. Nevertheless, the low temperature operation leads to some problems and difficulties related to specific cryogenic conditions. For instance, the impurity freeze-out, kink phenomenon, series resistance effects, transient behavior, changes in mobility laws make it difficult the physical understanding and modeling of MOS devices operated at low temperature (4.2–300K).
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Ghibaudo, G., Balestra, F. (2001). Device Physics and Electrical Performance of Bulk Silicon Mosfets. In: Balestra, F., Ghibaudo, G. (eds) Device and Circuit Cryogenic Operation for Low Temperature Electronics. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3318-1_2
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