Abstract
As wireless, multimedia, communications, and other embedded systems converge and increase in capability, the task of system and implementation designers to efficiently design and verify embedded systems grows exponentially. Overall, the compounding complexities of chip design, silicon process, SoC system context and complete end to end verification are presenting new system design challenges. They have focused attention on tools supporting hardware-software co-design using Intellectual Property (IP) based design techniques at the system level Using methodologies and tools described in this paper, users will dramatically increase predictability and productivity of their SOC hardware/software design flows enabled by advanced reuse of system level IP. The techniques described in this paper will also enable efficient communication between system level and implementation level design teams
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Schirrmeister, F., Krolikoski, S. (2001). Virtual Component HW/SW Co-Design. In: Ashenden, P.J., Mermet, J.P., Seepold, R. (eds) System-on-Chip Methodologies & Design Languages. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3281-8_28
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DOI: https://doi.org/10.1007/978-1-4757-3281-8_28
Publisher Name: Springer, Boston, MA
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