Reusing IPS to Implement a Sparc® Soc

  • Serafín Olcoz
  • Alfredo Gutiérrez
  • Denis Navarro
Chapter

Abstract

We present the gained experience dealing with the implementation of a SOC, reusing existing soft-cores. The application of a hardware-software virtual prototyping (co-simulation) approach used to functionally verify the system is also presented. This is specifically tackling the advantages and disadvantages of such a approach. The preparation of the deliverables-list needed to offer the soft and hard-cores as part of the semiconductor IP-products catalog. The communication description between the co-simulation and the soft-core management environment is presented in a separate section.

Keywords

Cache Memory Automatic Test Equipment Register Window Float Point Unit Remote Terminal Unit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 2001

Authors and Affiliations

  • Serafín Olcoz
    • 1
  • Alfredo Gutiérrez
    • 1
  • Denis Navarro
    • 2
  1. 1.Semiconductor Design SolutionsSIDSAMadridSpain
  2. 2.Departamento de Ingenieria Electronica y ComunicacionesUniversidad de ZaragozaZaragozaSpain

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