Abstract
This paper presents a sixth-order continuous-time bandpass sigma delta modulator (SDM) for analog-to-digital conversion of 10.7MHz intermediate frequency (IF) signals in AM/FM broadcast radio receivers. Sampled at 40MHz, the single-loop one-bit SDM achieves 67dB SNDR in 200kHz and 80dB in 9kHz. The third order intermodulation (IM3) is at -82dBc for a -10dBFS input level. The 0.5μm CMOS chip occupies 0.9×0.4mm2 and consumes 60mW at 3.3V (digital) and 5.0V (analog). The sample frequency is variable and can be set from 30MHz to 80MHz.
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References
K. Kianush and C. Vaucher, “A global car radio IC with inaudible signal quality checks,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) digest of technical papers, San Fransisco (CA), Feb. 1998, pp. 130–131.
Armond Hairapetian, “Bandpass delta–sigma converters in IF receivers,” in Analog Circuit Design, MOST RF circuits, Sigma–Delta Converters and Translinear Circuits,Willy Sansen, Johan H. Huij sing, and Rudy J. van de Plassche, Eds., pp. 193–209. Kluwer Academic Publishers, Dordrecht, NL, Apr. 1996, ISBN 0–7923–9776–2.
Steven R. Norsworthy, Richard Schreier, and Gabor C. Ternes, Eds., Delta–Sigma Data Converters; Theory, Design and Simulation,IEEE press, New York, 1997, ISBN 0–7803–1045–4.
R. Schreier and M. Snelgrove, “Bandpass sigma-delta modulation,” Electronic Letters, vol. 25, pp. 1560–1561, Nov. 1989.
F.W. Singor and M. Snelgrove, “10.7MHz bandpass sigma-delta A/D modulators,” in Proc. of the IEEE 1994 Custom Integrated Circuits Conference (CICC), San Diego, CA, May 1994, pp. 163–166.
Stephen A. Jantzi, Kenneth W. Martin, and Adel S. Sedra, “Quadrature bandpass AE modulation for digital radio,” IEEE Journal of Solid-State Circuits, vol. 32, no. 12, pp. 1935–1950, Dec. 1997.
Erik van der Zwan, Kathleen Philips, and Corné Bastiaansen, “A 10.7MHz IF-to-Baseband E6, A/D conversion system for AM/FM radio receivers,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) digest of technical papers, San Fransisco (CA), Feb. 2000, pp. 340–341.
Ichiro Fujimori, Lorenzo Longo, Armond Hairapetian, Kazushi Seiyama, Steve Kosic, Jun Cao, and Shu-Lap Chan, `A 90dB SNR, 2.5MHz output rate ADC using cascaded multibit AE modulation at 8x oversampling ratio,” in IEEE Int. Solid-State Circuits Conf (ISSCC) digest of technical papers, San Fransisco (CA), Feb. 2000, pp. 338–339.
Toshio Hayashi, Yasunobu Inabe, Kuniharu Uchimura, and Tadakatsu Kimura, “A multistage delta-sigma modulator without double integration loop,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) digest of Technical Papers, Feb. 1986, pp. 182–183.
Jurgen van Engelen and Rudy van de Plassche, Bandpass Sigma Delta Modulators: Stability Analysis, Performance and Design Aspects,Kluwer Academic Publishers, Dordrecht, the Netherlands, Oct. 1999, ISBN 07923–8698–1.
Richard Schreier and Bo Zhang, “Delta-sigma modulators employing continuous-time circuitry,” IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 43, no. 4, pp. 324–332, Apr. 1996.
J. van Engelen and R. van de Plassche, “A combined LC/gmC 4th order continuous-time bandpass EA modulator,” in Proc. of the European Solid-State Circuits Conference (ESSCIRC), The Hague (NL), 1998, pp. 156159.
J. van Engelen, R. van de Plassche, E. Stikvoort, and A. Venes, “A 6th order continuous time bandpass sigma delta modulator for digital radio IF,” IEEE Journal of Solid-State Circuits, vol. 34, no. 12, pp. 1753–1764, Dec. 1999.
E.J. van de Zwan, “A 2.3mW CMOS EA modulator for audio applications,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) digest of technical papers San Fransisco, 1997, pp. 220–221.
A. van Bezooijen, N. Ramalho, and J.O. Voorman, “Balanced integrator filters at video frequencies,” in Integrated Continuous–Time Filters, Y.P. Tsividis and J.O. Voorman, Eds., pp. 129–132. IEEE Press, New York, 1993, ISBN 0–7803–0425–X, (reprint from Digest ESSCIRC’91, pp. 1 – 4, 1991 ).
Zdzislaw Czarnul, “Modification of the Banu-Tsividis continuous-time integrator structure,” IEEE Trans. on Circuits and Systems, vol. 33, no. 7, pp. 714–716, July 1986.
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van Engelen, J. (2000). A 13-bit bandpass sigma delta modulator for 10.7MHz digital IF with a 40MHz sampling rate. In: van de Plassche, R.J., Huijsing, J.H., Sansen, W. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3198-9_6
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DOI: https://doi.org/10.1007/978-1-4757-3198-9_6
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