A 2.5MHz Output-Rate Delta-Sigma ADC with 90dB SNR and 102dB SFDR

  • Ichiro Fujimori
  • Lorenzo Longo
  • Armond Hairapetian
  • Kazushi Seiyama
  • Steve Kosic
  • Jun Cao
  • Shu-lap Chan


A 16-b, 2.5MHz output-rate ADC for wireline communications and high-speed instrumentation has been developed. A 2-1-1 cascaded delta-sigma modulator employing 4-b quantizers in all stages makes quantization noise sources negligible at 8X oversampling ratio. Data weighted averaging with bi-directional rotation eliminates tones generated by multibit DAC nonlinearity to increase SFDR. Switched-capacitor design techniques using low-threshold transistors reduce front-end sampling distortion. The 24.8mm2 chip in 0.5-um CMOS also integrates the decimation filter and voltage reference. The ADC achieves 90dB SNR in the 1.25MHz bandwidth and 102dB SFDR with 270mW power dissipation.


Quantization Noise Total Harmonic Distortion Noise Shaping Input Switch Decimation Filter 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    G. Yin and W. Sansen, “A high-frequency and high-resolution fourth-order delta-sigma A/D converter in BiCMOS technology,” IEEE J. Solid-State Circuits, vol. 29, pp. 857–865, Aug. 1994.CrossRefGoogle Scholar
  2. [2]
    A. Marques, V. Peluso, M. Steyaert, and W. Sansen, “A 15-b resolution 2-MHz nyquist rate delta-sigma ADC in a 1-um CMOS technology,” IEEE J. Solid-State Circuits, vol. 33, pp. 1065–1075, Jul. 1998.CrossRefGoogle Scholar
  3. [3]
    Y. Geerts, A. Marques, M Steyaert, and W. Sansen, “A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1MHz for ADSL applications,” IEEE J. Solid-State Circuits, vol. 34, pp. 927–936, Jul. 1999.CrossRefGoogle Scholar
  4. [4]
    F. Medeiro, B. Perz-Verdu, and A. Rodriquez-Vazquez, “A 13-bit, 2.2MS/s, 55mW multibit cascade sigma-delta modulator in CMOS 0.7-um single-poly technology,” IEEE J. Solid-State Circuits, vol. 34, pp. 748–760, Jun. 1999.CrossRefGoogle Scholar
  5. [5]
    D. Ribner, R. Baertsch, S. Garverick, D. McGrath, J. Krisciunas, and T. Fujii, “ A third-order multistage sigma-delta modulator with reduced sensitivity to nonidealities,” IEEE J. Solid-State Circuits, vol. 26, pp. 1764–1774, Dec. 1991.CrossRefGoogle Scholar
  6. [6]
    B. Brandt and B. Wooley, “A 50-MHz multibit sigma-delta modulator for 12-b, 2-MHz A/D conversion,” IEEE J. Solid-State Circuits, vol. 26, pp. 1746–1756, Dec. 1991.CrossRefGoogle Scholar
  7. [7]
    T. Brooks, D. Robertson, D. Kelly, A. Del Muro, and S. Harston, “A cascaded sigma-delta pipeline A/D converter with 1.25MHz signal bandwidth and 89dB SNR,” IEEE J. Solid-State Circuits, vol. 32, pp. 1896–1906, Dec. 1997.CrossRefGoogle Scholar
  8. [8]
    I. Fujimori, L. Longo, A. Hairapetian, K. Seiyama, S.Kosic, J. Cao, and S. Chan, “A 90dB SNR, 2.5MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8x oversampling ratio,” ISSCC Digest of Technical Papers, pp. 338–339, Feb. 2000Google Scholar
  9. [9]
    M. Rebeschini, N. van Bavel, P. Rakers, R. Greene, J. Caldwell, and J. Haug, “ A 16-b 160-kHz CMOS A/D converter using sigma-delta modulation,” IEEE J. Solid-State Circuits, vol. 25, pp. 431440, Apr. 1990.Google Scholar
  10. [10]
    S. Kayanuma and K. Iki, “Method for fabrication of semiconductor device having polycrystalline silicon and metal silicides,” U.S. Patent 5 397 729, Mar. 1995.Google Scholar
  11. [11]
    R. Baird and T. Fiez, “Linearity enhancement of multibit delta-sigma A/D and D/A converters using data weighted averaging,” IEEE Trans. on Circuits and Systems II, vol. 42, pp. 753–762, Dec. 1995.CrossRefGoogle Scholar
  12. [12]
    I. Fujimori, A. Nogi, and T. Sugimoto, “A multi-bit delta-sigma audio DAC with 120dB dynamic range,” ISSCC Digest of Technical Papers, pp. 152–153, Feb. 1999.Google Scholar
  13. [13]
    R. Rudke, A. Eshraghi, and T. Fiez, “A spurious-free delta-sigma DAC using rotated data weighted averaging,” in proc. IEEE 1999 CICC, pp. 7.5. 1–4, May 1999.Google Scholar
  14. [14]
    R. Scherier and B. Zhang, “Noise-shaped multibit D/A converter employing unit elements, Electronic Letters, vol. 31, pp. 17121713, Sep. 1995.Google Scholar
  15. [15]
    I. Fujimori, K. Koyama, D. Trager, F. Tam, and L. Longo, “A 5V single-chip delta-sigma audio A/D converter with 111 dB dynamic range,” IEEE J. Solid-State Circuits, vol. 32, pp. 329–336, Mar. 1997.CrossRefGoogle Scholar
  16. [16]
    D. Haigh and B. Singh, “A switching scheme for switched capacitor filters which reduces the effect of parasitic capacitances with switch control terminals,” in Proc. IEEE 1983 ISCAS, pp. 586589, May. 1983.Google Scholar
  17. [17]
    B. J. Hosticka, “Improvement of the gain of MOS amplifiers,” IEEE J. Solid-State Circuits, vol. SC-14, pp. 1111–1114, Dec. 1979.Google Scholar
  18. [18]
    R. Gregorian and G. Ternes, Analog MOS Integrated Circuits for Signal Processing,New York: Wiley Interscience, 1986, ch. 4.Google Scholar
  19. [19]
    K. Kim, N. Kusayanagi, and A. Abidi, “A 10-bit, 100Ms/s CMOS A/D converter, IEEE J. Solid-State Circuits, vol. 32, pp. 302–311, Mar. 1997.CrossRefGoogle Scholar
  20. [20]
    E. Fogleman, I. Galton, W. Huff, and H. Jensen, “A 3.3V single-poly CMOS audio ADC delta-sigma modulator with 98dB peak SINAD,” in Proc. IEEE 1999 CICC, pp. 7.4. 1–4, May 1999.Google Scholar
  21. [21]
    S. Norsworthy, R. Schreier, and G. Ternes, Delta-Sigma Data Converters: Theory, Design, and Simulation,New York: IEEE Press, 1997, ch. 13.Google Scholar
  22. [22]
    B. Stanisic, N. Verghese, R. Rutenbar, R. Carley, and D. Allstot, “Addressing substrate coupling in mixed-mode IC’s: Simulation and power distribution synthesis,” IEEE J. Solid-State Circuits, vol. 29, pp. 226–23 8, Mar. 1994.Google Scholar
  23. [23]
    A. Yasuda, H. Tanimoto, and T. lida, “A third-order delta-sigma modulator using second-order noise-shaping dynamic element matching,” IEEE J. Solid-State Circuits, vol. 33, pp. 1879–1897, Dec. 1998.CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media New York 2000

Authors and Affiliations

  • Ichiro Fujimori
    • 1
  • Lorenzo Longo
    • 2
  • Armond Hairapetian
    • 2
  • Kazushi Seiyama
    • 3
  • Steve Kosic
    • 1
  • Jun Cao
    • 2
  • Shu-lap Chan
    • 1
  1. 1.AKM SemiconductorSan DiegoUSA
  2. 2.Newport CommunicationsIrvineUSA
  3. 3.Asahi-Kasei MicrosystemsKanagawaJapan

Personalised recommendations