A Dual Mode 700 MSamples/s 6-bit, 200MSamples/s 7-bit A/D Converter in 0.25 Micron Digital CMOS

  • K. Nagaraj
  • David Martin
  • Mark Wolfe
  • Ranjan Chattopadyay
  • Shanthi Pavan
  • Jason Cancio
  • T. R. Viswanathan

Abstract

The design of a high speed A/D converter for hard disk drive read channels is described. It has 6-bits of resolution at full speed, as well as a 7-bit mode operating at a lower speed. The 7-bit mode is useful for servo signal processing. This A/D converter has been implemented in a four level metal, single poly 0.25μm CMOS technology. The chip operates at a speed of up to 700 MSamples/s in the 6-bit mode while maintaining an SNDR of greater than 35 dB at input frequencies of up to one fourth the sampling rate. In the 7-bit mode, the device operates at up to 200 MSamples/s with a SNDR greater than 40 dB. It occupies an active area of 0.45 sq. mm and consumes less than 187 mW of power.

Keywords

Reference Voltage Output Buffer Auxiliary Input Input Transistor Source Follower 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [1]
    I. Mehr and D. Dalton, “A 500-MSamples/s, 6-bit Nyquitst rate ADC for disk drive read-channel applications”, IEEE Journal of Solid State Circuits, Vol. 34, pp 912–919, July 1999CrossRefGoogle Scholar
  2. [2]
    K. Nagaraj, “2 1/2 step flash A/D converter”, Electronics Letters, Vol. 28, pp 1975–1976, October 1992.CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media New York 2000

Authors and Affiliations

  • K. Nagaraj
    • 2
  • David Martin
    • 2
  • Mark Wolfe
    • 1
  • Ranjan Chattopadyay
    • 2
  • Shanthi Pavan
    • 2
  • Jason Cancio
    • 2
  • T. R. Viswanathan
    • 1
  1. 1.Texas InstrumentsWarrenUSA
  2. 2.Texas InstrumentsDallasUSA

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