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ADSL CODEC Architecture that Minimizes DSP Computational Burden

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Analog Circuit Design

Abstract

The optimum analog front-end architecture for ADSL modems results from careful consideration of international ADSL standards, the attenuation characteristics of subscriber loops, the echo return loss of typical hybrid networks and the duplexing method employed. The architecture proposed here is based upon oversampled data converters. It relies on digital filters for standards compliance and minimizes analog filters.

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References

  1. Proposed Summaries for new Recommendations G.992.1, G.992.2, G.994.1, G.995.1, G.996.1 and G.997.1, ITU-Telecommunications Standardization Sector, Study Group 15, Geneva, 12 October, 1998.

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  2. D. Langford, B. Tesch, B. Williams and G. Nelson, “A BiCMOS Analog Front-End Circuit for an FDM-Based ADSL System,” IEEE J Solid-State Circuits, vol. 33, pp. 1383–1393, Sept. 1998.

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© 1999 Springer Science+Business Media Dordrecht

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Hester, R.K. (1999). ADSL CODEC Architecture that Minimizes DSP Computational Burden. In: Sansen, W., Huijsing, J., van de Plassche, R. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3047-0_2

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  • DOI: https://doi.org/10.1007/978-1-4757-3047-0_2

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-5101-4

  • Online ISBN: 978-1-4757-3047-0

  • eBook Packages: Springer Book Archive

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