With the trends now found in electronic technology, increasing complexity, supply voltage reduction and very high switching speed, parasitic coupling between circuits is becoming a critical issue in the design and testing of modern and future integrated circuits. Inductive, capacitive, resistive and electromagnetic coupling mechanisms are limiting the performance possibilities of VLSI circuits, meaning that design engineer’s understanding of such principles is one of today’s major issues in both academic and industrial sphere.
KeywordsGuard Ring CMOS Logic Switching Noise Parasitic Inductance Noise Coupling
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