Conclusions

  • Xavier Aragonès
  • José Luis González
  • Antonio Rubio
Chapter

Abstract

With the trends now found in electronic technology, increasing complexity, supply voltage reduction and very high switching speed, parasitic coupling between circuits is becoming a critical issue in the design and testing of modern and future integrated circuits. Inductive, capacitive, resistive and electromagnetic coupling mechanisms are limiting the performance possibilities of VLSI circuits, meaning that design engineer’s understanding of such principles is one of today’s major issues in both academic and industrial sphere.

Keywords

Guard Ring CMOS Logic Switching Noise Parasitic Inductance Noise Coupling 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1999

Authors and Affiliations

  • Xavier Aragonès
    • 1
  • José Luis González
    • 1
  • Antonio Rubio
    • 1
  1. 1.Universitat Politècnica de Catalunya (UPC)Spain

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