Abstract
Oversampling converters, (or those that use a sampling frequency much larger than the Nyquist frequency of the signal being converted, [Stee75]) have become very popular during the last decade. Such success is due to the fact that they can solve some of the problems encountered in other architectures for digital CMOS implementations, mainly the need for high-selectivity analog filters, and large sensitivity to the circuitry imperfections and noisy environs.
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An isolated quantizer can be considered as a zero-order modulator.
An analysis of the time-domain response of 1 st- and 2nd-order modulators is given in Appendix A.
In [Goods95] the study is extended to the static-input third-order modulator case by using the concept of invariant sets. However, the application of this method to higher-order modulators or with dynamic inputs is extremely complex.
A similar architecture using a multi-bit quantizer was proposed by Carley [Car187].
Note that this problem would not appear if the quantization were single bit, because, that being the case, the D/A converter would be perfectly linear per construction.
However, the power consumption of the digital part must be taken into account to realistically compare oversampled with non-oversampled A/D converters [Good96].
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© 1999 Springer Science+Business Media Dordrecht
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Medeiro, F., Pérez-Verdú, A., Rodríguez-Vázquez, A. (1999). Oversampling Sigma-Delta A/D converters. In: Top-Down Design of High-Performance Sigma-Delta Modulators. The Springer International Series in Engineering and Computer Science, vol 480. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3003-6_2
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DOI: https://doi.org/10.1007/978-1-4757-3003-6_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5067-3
Online ISBN: 978-1-4757-3003-6
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