Design Techniques to Reduce Substrate Noise

  • Tallis Blalack

Abstract

Substrate noise fundamentals are first presented. Next, reducing the noise created by the digital circuitry is discussed. Decreasing the sensitivity of the analog circuitry is covered, and isolation techniques to minimize noise coupling between areas are identified. Finally, a design example is presented to illustrate the difficulty in correctly identifying substrate-noise coupling.

Keywords

Bond Wire NMOS Transistor PMOS Transistor Guard Ring Substrate Contact 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1999

Authors and Affiliations

  • Tallis Blalack
    • 1
  1. 1.SnaketechSan JoseUSA

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