SOI CMOS Devices—Advanced

  • James B. Kuo
  • Ker-Wei Su
Chapter

Abstract

In this chapter, further reports on the SOI CMOS devices are described. For SOI CMOS technology, in addition to the inversion-mode devices, owing to the buried oxide isolation structure, accumulation-mode devices are also important. In this chapter, first, the DC and the capacitance models for the accumulation-mode SOI MOS devices are presented. Recently, the trends on the fully-depleted SOI CMOS devices are toward using very thin silicon thin-films. With a very thin silicon thin-film, device second order effects can be further improved. However, when the silicon thin-film is too thin, the threshold voltage of the SOI CMOS devices may be very sensitive to the silicon thin-film thickness. As a result, fully-depleted SOI CMOS devices with a very thin silicon thin-film may not be practical for mass production from a manufacturing point of view. Therefore, SOI technology goes back for a thicker silicon thin-film. With a thicker silicon thin-film, the silicon thin-film may not be fully depleted— partially-depleted SOI CMOS devices. For partially-depleted SOI MOS devices, due to the floating body structure, impact ionization and parasitic BJT effects are important. As a result, the kink effect in the strong inversion and peculiar subthreshold characteristics have been observed. In addition, due to the floating body structure, the positive feedback in the device causes the single-transistor latch phenomenon. Furthermore, the breakdown voltage can also be affected by the floating body.

Keywords

Threshold Voltage Drain Current Gate Oxide Drain Voltage Subthreshold Slope 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1998

Authors and Affiliations

  • James B. Kuo
    • 1
  • Ker-Wei Su
    • 1
  1. 1.National Taiwan UniversityTaiwan

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