SOI CMOS Circuits

  • James B. Kuo
  • Ker-Wei Su


In the previous chapter, SOI technology has been described. Due to the unique oxide isolation structure, SOI CMOS devices are latchup-free. In addition, parasitic capacitances are small. Better subthreshold characteristics and transconductance characteristics can be expected from SOI CMOS devices. Furthermore, reduced leakage currents and good radiation hardness are strong points of SOI CMOS devices. As shown in Fig. 3.1, due to the unique structure, device density of an SOI CMOS circuit can be enhanced substantially, as compared to the bulk CMOS circuit[1]. As shown in the figure, NMOS and PMOS SOI devices can be placed adjacent to each other. Therefore, in the future of the circuit design for VLSI, SOI is an important technology. In this chapter, SOI CMOS circuits are described.


Leakage Current Threshold Voltage Body Contact Dynamic Random Access Memory SRAM Cell 
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Copyright information

© Springer Science+Business Media Dordrecht 1998

Authors and Affiliations

  • James B. Kuo
    • 1
  • Ker-Wei Su
    • 1
  1. 1.National Taiwan UniversityTaiwan

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