SOI CMOS Technology

  • James B. Kuo
  • Ker-Wei Su
Chapter

Abstract

In this chapter, SOI CMOS technology is described. Starting from the evolution of SOI technology, various SOI substrate and isolation techniques are introduced. Then, a 0.25μm SOI CMOS fabrication processing sequence is described, followed by major SOI CMOS device structures. In the final portion of this chapter, special-purpose SOI technologies including DRAM, BiCMOS, and power are described.

Keywords

Chemical Mechanical Polishing Polysilicon Layer Breakdown Electric Field Silicon Nitride Layer Bury Oxide Layer 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1998

Authors and Affiliations

  • James B. Kuo
    • 1
  • Ker-Wei Su
    • 1
  1. 1.National Taiwan UniversityTaiwan

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