VHDL

  • Petru Eles
  • Krzysztof Kuchcinski
  • Zebo Peng
Chapter

Abstract

VHDL is an acronym for VHSIC Hardware Description Language (VHSIC stands for Very High Speed Integrated Circuits). The language was intended to be a standardized HDL to support design, documentation, and verification of digital systems. The development of VHDL was sponsored by the US Department of Defence during the 1980s. In 1987 the language was adopted by the IEEE as a standard; this version of VHDL is known as the IEEE Std. 1076–1987 [IEEE87]. A new version of the language, VHDL’92 (IEEE Std. 1076–1993) [IEEE93, BFMR93], resulted after revision of the initial standard in 1993. The discussion in the present chapter is based on this new standard.

Keywords

Simulation Mechanism Simulation Cycle Signal Assignment Package Body Assertion Statement 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1998

Authors and Affiliations

  • Petru Eles
    • 1
  • Krzysztof Kuchcinski
    • 2
  • Zebo Peng
    • 2
  1. 1.Timisoara Technical UniversityRomania
  2. 2.Linkoping UniversitySweden

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