The majority of the examples and textual elaborations discussed in this section originated with Joseph Pick’s excellent tutorial, VHDL Synthesis Techniques and Recommendations[11], presented at the 1996 Synopsys Users Group Conference.


Field Programmable Gate Array Finite State Machine Register File Combinational Logic Hardware Description Language 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media New York 1997

Authors and Affiliations

  • Ben Cohen

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