Abstract

Arrays represent a very important data structure in VHDL because they represent busses, registers, and memories. The language provides several rules regarding the manipulation of arrays. This section addresses many of those issues, including array operations, array initialization, use of constrained and unconstrained arrays, and mapping of arrays of different sizes. The application of arrays in synthesis is also addressed.

Keywords

Dimensional Array Array Type Multidimensional Array Array Initialization Implicit Operation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1997

Authors and Affiliations

  • Ben Cohen

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