Abstract
Synthesizer architectures suitable for high integration level are reviewed and qualitatively analysed w.r.t. complexity, power dissipation, phase noise and spurious performance. The effect of the PLL noise sources on the output noise is described, and the noise performance of a double loop configuration is presented.
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© 1997 Springer Science+Business Media Dordrecht
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Vaucher, C. (1997). Synthesizer Architectures. In: van de Plassche, R.J., Huijsing, H.H., Sansen, W. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-2602-2_14
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DOI: https://doi.org/10.1007/978-1-4757-2602-2_14
Publisher Name: Springer, Boston, MA
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