EDgAR: A Platform for Hardware/Software Codesign

  • A. J. Esteves
  • J. M. Fernandes
  • A. J. Proença


Codesign is a unified methodology to develop complex systems with hardware and software components. EDgAR, a platform for hardware/software codesign is described, which is intended to prototype complex digital systems. It employs programmable logic devices (MACHs and FPGAs) and a transputer-based parallel architecture. This platform and its associated methodology reduce the systems production cost, decreasing the time for the design and the test of the prototypes. The EDgAR supporting tools are introduced, which were conceived to specify systems at a high-level of abstraction, with a standard language and to allow a high degree of automation on the synthesis process. This platform was used to emulate an integrated circuit for image processing purposes.


Software Component Parallel Architecture Configuration File Storage Element Swap Operation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    Mike Spivey and Ian Page. How to Design Hardware with Handel, Oxford University Computing Laboratory, December 1993.Google Scholar
  2. [2]
    Rajesh K. Gupta and Giovanni De Micheli. System-level Synthesis using Re-programmable Components. In Proceedings of the European Conference on Design Automation, pages 2–7, Brussels, Belgium, February 1992.Google Scholar
  3. [3]
    Antonio Joaquim Esteves. Rapid Prototyping of Digital Systems. Technical report, Dep. Informatica, Universidade do Minho, Braga, Portugal, July 1994.Google Scholar
  4. [4]
    M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. A Formal Specification Model for Hardware/Software Codesign. Technical report ERL-93–48, University of California - Berkeley, June 1993.Google Scholar
  5. [5]
    C. A. R. Hoare. Communicating Sequential Processes. Prentice-Hall International, 1985.Google Scholar
  6. [6]
    Manuel Silva and Robert Valette. Petri Nets and Flexible Manufacturing. In G. Rozenberg, editor, Advances in Petri Nets 89, volume 424 of Lecture Notes in Computer Science, pages 376–417. Springer-Verlag, Berlin, Germany, 1990.Google Scholar
  7. [7]
    Douglas L. Perry. VHDL. McGraw-Hill, 1991.Google Scholar
  8. [8]
    Jodo Miguel Fernandes. Petri Nets and VHDL on the Specification of Parallel Controllers. Master’s thesis, Dep. Informatica, Universidade do Minho, Braga, Portugal, July 1994.Google Scholar
  9. [9]
    Rolf Ernst, Jorg Henkel, and Thomas Benner. Hardware-Software Cosynthesis for Microcontrollers. IEEE Design €4 Test of Computers, December 1993.Google Scholar
  10. [10]
    Asawaree Kalavade and Edward Lee. A Global Criticality/Local Phase Driven Algorithm for the Hardware/Software Partitioning Problem. In Proceedings of the 3rd International Workshop on Hardware/Software Codesign, pages 42–48, Grenoble, France. IEEE Computer Society Press, September 1994.Google Scholar
  11. [11]
    Frank Vahid. A Survey of Behavioral-Level Partitioning Systems. Technical report 91–71, Dept. of Information and Computer Science, University of California, Irvine, October 1991.Google Scholar
  12. [12]
    W. Billowitch. Simulation Models for Support Hardware/Software Integration. Computer Design, 1988.Google Scholar
  13. [13]
    Henrique D. Santos, José C. Ramalho, Joâo M. Fernandes, and Alberto J. Proença. A heterogeneous computer vision architecture: implementation issues. Computing System in Enginneering, 6 (4/5): 401–8, 1995.CrossRefGoogle Scholar
  14. [14]
    A. W. G. Duller, R. H. Storer, A. R. Thomson, E. L. Dagless, M. R. Pout, and A. P. Marriot. Design of an Associative Processor Array. IEE Proceedings, 136, 1989.Google Scholar
  15. [15]
    Antonio Esteves. Emulation of an Associative Processor Array with EDgAR Platform. Technical report UMDITR9602, Dep. Informatica, Universidade do Minho, Braga, Portugal, May 1996.Google Scholar

Copyright information

© Springer Science+Business Media Dordrecht 1997

Authors and Affiliations

  • A. J. Esteves
    • 1
  • J. M. Fernandes
    • 1
  • A. J. Proença
    • 1
  1. 1.Departamento de Informática, Escola de EngenhariaUniversidade do MinhoBraga codexPortugal

Personalised recommendations