Reasoning in Boolean Networks pp 17-47 | Cite as
Combinational ATPG
Chapter
Abstract
A utomatic T est P attern G eneration (ATPG) for combinational circuits has been an active field of research for many years. This chapter introduces the basic algorithmic concepts of deterministic test generation for single stuck-at faults in combinational circuits. Today, combinational ATPG for single stuck-at faults is considered quite mature. Most modern tools are based on the contributions of [Roth66], [Goe181], [FuSh83], [ScTr87] and [Larr89].
Keywords
Test Generation Direct Implication Test Vector Fault Signal Primary Input
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
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Copyright information
© Springer Science+Business Media Dordrecht 1997