Autozeroing and Correlated Double Sampling Techniques

  • Gabor C. Temes

Abstract

In linear ICs fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to dc offset and low-frequency noise becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques will be described for the compensation of these nonideal effects.

Keywords

Clock Phase Gain Error Correlate Double Sampling Virtual Ground Feedback Capacitor 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1996

Authors and Affiliations

  • Gabor C. Temes
    • 1
  1. 1.Oregon State UniversityCorvallisUSA

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