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Design for Testability

  • Pran Kurup
  • Taher Abbasi

Abstract

The ever-increasing density of ASICs, the whole-sale switch to surfacemount technology, and the growing interest in multi-chip modules (MCM), have resulted in testable designs becoming a greater priority. Thus far, designers have considered testability as an issue which comes into play at the very end of the design cycle. However, in the ASIC design flow based on synthesis, it is essential that designers develop a test strategy and address testability issues concurrently with other activities in the design cycle. In this chapter, Test Synthesis and Automatic Test Pattern Generation (ATPG) using the Synopsys Test Compiler (referred to as TC, for short), are discussed.

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Recommended further reading

  1. 1.
    Test Compiler Reference Manual v3.2a chapter 5,7,11,12Google Scholar
  2. 2.
    Test Compiler Streamlined Methodology Application Note Google Scholar
  3. 3.
    Fall 1994 Synopsys Newsletter Impact Support Center Q&AGoogle Scholar
  4. 4.
    Winter 1994 Synopsys Newsletter Impact Support Center Q&AGoogle Scholar

Copyright information

© Springer Science+Business Media New York 1995

Authors and Affiliations

  • Pran Kurup
    • 1
  • Taher Abbasi
    • 2
  1. 1.Cirrus Logic, Inc.USA
  2. 2.Synopsys, Inc.USA

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