Three Large Examples

  • Donald E. Thomas
  • Philip R. Moorby


MiniSim is a description of a very simplified gate level simulator. Only three primitives have been included: a nand gate, a D positive edge-triggered flip flop, and a wire that handles the full strength algebra that is used in Verilog. All primitive timing is unit delay, and a record is kept of the stimulus pattern number and simulation time within each pattern. Each primitive is limited to two inputs and one output that has a maximum fanout of two.


Nand Gate Cache Instruction Instruction Fetch Primitive Timing Side Instruction 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media New York 1995

Authors and Affiliations

  • Donald E. Thomas
    • 1
  • Philip R. Moorby
    • 2
  1. 1.Carnegie Mellon UniversityUSA
  2. 2.Symplify CorporationUSA

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